1. Technical Field
The disclosure relates to a read only memory (ROM); more particularly, the disclosure relates to an ROM constraining a 2nd-bit effect.
2. Related Art
An ROM having the charge storage structure for data storage is a common non-volatile memory at present. The structure of the ROM includes a gate insulation layer (e.g., an oxide-nitride-oxide (ONO) layer) capable of storing and even trapping charges. If charges are stored by a localized charge trapping structure, two separated charge bits are allowed to exist in each memory cell, so as to form a 2 bits in one cell (2 bits/cell) memory.
In order to read separated charges at two sides of one 2 bits/cell memory, a reverse read operation is performed. During the reverse read operation, a read bias is applied to a source terminal to sense charges at a drain side junction and thereby complete the read operation, and vice versa. If charges exist at a source side junction, the read bias need be high enough to lessen the influence of the charges at the source side junction.
However, during operation of the 2 bits/cell memory, the 2 bits in one cell may still interact, thus leading to relevant problems. Hence, given that one bit has been stored at one side of the memory cell, a 2nd-bit effect occurs when the other side of the memory cell is being read, i.e., a voltage in the portion where a high current is expected may drop. Namely, when the memory cell is being read, the existing bit poses a direct impact on the memory cell, thus increasing a barrier and a threshold voltage (Vt) for reading. Under said circumstances, a read error is likely to occur.
The 2nd-bit effect not only implicates the operation of devices but also deteriorates the device reliability. Moreover, the 2nd-bit effect reduces a sense margin and a Vt window for operating the left bit and the right bit, thus giving rise to operation difficulties of a multi-level memory.